This application claims the benefit of Korean Patent Application No. 2002-0046611, filed Aug. 7, 2002, the disclosure of which is hereby incorporated herein by reference in its entirety as if set forth fully herein.
The present invention relates to methods for forming integrated circuit devices, and more particularly to methods for forming gate oxide films of a integrated circuit device.
In some highly integrated semiconductor devices, shallow trench isolation (STI) structures have been utilized for the isolation of active areas therein. In some conventional processes used to form STI structures, a pad oxide film and a nitride film are successively formed on a silicon substrate and then nitride film is patterned. A trench can be formed by etching the substrate to a predetermined depth using the patterned nitride film as an etching mask. An oxide film is formed to cover the trench and is left only in the trench, using an etch-back process or a chemical-mechanical polishing (CMP) process, thereby forming the STI structure.
A thin oxide film can be formed in the trench using a thermal oxidization process. An oxide film can then be formed to fill the trench in order to compensate for damage to the silicon substrate that may be caused during the etching process. However, the volume of the oxide film in the trench may increase due to the heat generated during successive thermal processes, such as the process for forming the gate oxide film, thereby potentially causing silicon dislocations in the substrate.
If the nitride film that serves as the etching mask is removed using a wet etching process, a dent may occur at the surface boundary between the active region and the STI region. Hence, the thickness of the gate oxide film may be reduced at the edge portion of the active region adjacent to the upper corner of the STI region so that an inverse narrow width effect may occur. The inverse narrow width effect may reduce the reliability of the gate oxide film because the electric field may be concentrated at the edge portion of the active region as the thickness of the gate oxide film is reduced. The inverse narrow width effect may reduce the threshold voltage of a transistor, particularly when the channel width of the transistor is also reduced.
It is known to form a thin nitride liner on the inner sidewall of the trench in order to reduce the thinning of the gate oxide film at the edge portion of the active region and to reduce additional oxidization of the trench due to penetration of oxygen (O2) into the inner sidewall of the trench during a successive oxidization process.
Generally, a volume of a layer including silicon increases when the silicon is oxidized. The volume of the oxide film in the trench may, therefore, be increased while the inner sidewall of the trench is oxidized as the oxide film fills the trench. Hence, a stress can be generated in the semiconductor substrate such that silicon dislocation may occur in the substrate which may give rise to a leakage current. The leakage current can be generated by silicon dislocation that may provide a path for an electron flow in the substrate. The nitride liner may reduce a stress caused by the increase in the volume of the insulation film in the trench, and may prevent oxygen from penetrating into the trench during the successive oxidization process discussed above, which may reduce or prevent silicon dislocation and, thereby reduce the leakage current.
It is also known to form multiple gate oxide films having various thickness in various regions of a substrate. For example, some conventional SRAM devices include a dual gate oxide film in which one gate oxide film is thin in the cell region of the SRAM device while the other gate oxide film is thick on the input/output terminal. DRAM devices can also include dual gate oxide films having a thick gate oxide film in the cell region and a thin gate oxide film in the peripheral region. In this case, the refresh operations and the quality of the gate oxide film can be improved because the threshold voltage of a cell transistor therein can be compensated by the increase in the thickness of the gate oxide film in the cell region such that the dosage of ions implanted into the channel can be reduced.
Multiple gate oxide films are generally formed through a wet etching process or a process in which the oxidization rate of an oxide film can be varied by implanting ions, such as fluorine (F) or nitrogen (N) ions. In some conventional methods of forming dual gate oxide films using wet etching, after a first gate oxide film is formed on a semiconductor substrate, a portion of the first gate oxide film is removed from a first region of the semiconductor substrate through a photolithography process and a wet etching process. Then, a second gate oxide film is formed on the whole surface of the substrate so that the dual gate oxide film has a thickness in a second region of the substrate that is greater than the thickness of the dual gate oxide film in the first region of the substrate.
In general, the gate oxide film can be formed: 1) through a dry oxidization process using an O2 gas; 2) through a hydrochloric acid oxidization process using O2/HCl gas; or 3) through a wet oxidization process using a gas of H2/O2 or H2O. An oxide film formed by either the dry oxidation process or the hydrochloric acid oxidization process may have defects known as xe2x80x9cmicro poresxe2x80x9d or voids formed therein. However, the hydrochloric acid oxidization process may also provide neutralization (or Gettering) of the alkali metal ions in a silicon oxide film, improved channel mobility, and an improved Time Zero Dielectric Breakdown (TZDB) characteristic indicating the short term reliability of the semiconductor device. In contrast, an oxide film formed using the wet oxidization process may have fewer micro pore defects or voids (compared to both the dry process and the hydrochloric acid oxidization) and may have good Time-Dependent Dielectric Breakdown (TDDB) characteristic representing the long-term reliability of the semiconductor device. Hence, the oxide film may be preferably formed using either the wet process or the hydrochloric acid oxidization process considering the desired reliability of the semiconductor device. On the other hand, because the wet oxidization process can grow an oxide film rapidly, it may be desirable to grow the oxide film using the hydrochloric acid oxidization process in some circumstances, such as where a highly integrated semiconductor device calls for a thin gate oxide film having a thickness of less than approximately 60 xc3x85.
When the gate oxide film is formed in a semiconductor device (having an STI structure including a liner formed in the trench) using the hydrochloric acid oxidization process, the thickness of the gate oxide film can be abnormally thickened at the edge portion of the active region, which is the upper corner of the STI region. As a result, the effective width of the channel that provides a passage for current flow in the device may be shortened and the saturation current may also be reduced which can reduce the speed of the transistor when the transistor is turned xe2x80x9conxe2x80x9d (i.e., when a threshold voltage is applied to the gate electrode of the transistor).
FIG. 1 is a graph showing variations of saturation current of a cell transistor according to conventional methods of forming a gate oxide film. For example, in cases where a dual gate oxide film is employed in the semiconductor device having the minimum size of approximately 0.126 xcexcm, the first gate oxide film formed using a hydrochloric acid oxidization process (denoted by xe2x80x9c◯xe2x80x9d) has a Idsat that is approximately 30 percent less than that of the first gate oxide film formed by the wet oxidization process (denoted by xe2x80x9cxe2x97xafxe2x80x9d) when the threshold voltage is about 1.4 Volts (V) as shown in FIG. 1.
FIG. 2 is a schematic cross-sectional view illustrating thickening of a gate oxide film at edge portion of an active region according to a hydrochloric acid oxidization process. FIG. 3 is a graph shown in; the thickness of an oxide film as a function of time formed at a temperature of approximately 850xc2x0 C. according to conventional methods.
Two of the reasons that the thickness of the ate oxide film can thicken at the edge portion of the active region when the gate oxide film is formed by the hydrochloric acid oxidization process are discussed below. Specifically, the two reasons address the formation of the gate oxide film using the hydrochloric acid oxidization process in a semiconductor device that includes the STI structure having a liner on the inner sidewall of the trench.
With reference to FIG. 2, a tensile stress (T.S) associated with a nitride liner (NL) can cause the nitride film to become thicker in the vertical direction. Such tensile stress of the nitride liner can be transferred to the inner oxide film (TIO) formed on the inner sidewall of the trench. The tensile stress (T.S) of the inner oxide film (TIO) can cause a compressive stress (C.S) effect between the inner sidewall of the trench and the inner oxide film (TIO) in the horizontal direction as shown in FIG. 2.
As shown in FIG. 3, the growth rate of the oxide film formed using the hydrochloric acid oxidization process (denoted by xe2x80x9cxe2x96xa1xe2x80x9d) is greater than that of the oxide film formed with the dry oxidization process (denoted by xe2x80x9c◯xe2x80x9d). In the hydrochloric acid oxidization process (xe2x96xa1), the growth rate of the oxide film can be reduced for thickness of approximately 40 xc3x85 whereas the growth rate of the oxide film formed using the wet oxidization process (denoted by xe2x80x9cxcex94xe2x80x9d) can increase linearly. As a result, the hydrochloric acid oxidization process (xe2x96xa1) is a diffusion limited process compared to the dry oxidization process (◯) and the wet oxidization process (xcex94).
In the diffusion limited process, the growth rate of the oxide film can be varied in accordance with the stress in the oxide film. That is, as shown in FIG. 2, when the compressive stress (C.S) is applied to the inner oxide film (TIO) in the trench in the horizontal direction, the diffusion of O2 is limited and the diffusion of HCl is restrained so that the concentration of HCl can be locally increased toward the upper corner of the STI region and the edge portion of the active region. When the concentration of HCl increases, the thickness of the oxide film can also increase due to the growth of the oxide film as shown in FIG. 3.
Japanese Laid-Open Patent Publication No. 11-145132 discusses a method of forming a gate oxide film by successively treating in a chloride gas atmosphere after a semiconductor substrate is previously treated under the chloride gas atmosphere and the gate oxide film is formed in an oxygen gas atmosphere. Japanese Laid-Open Patent Publication No. 7-169762 discloses another method in which a gate oxide film is treated in an inert gas atmosphere after a semiconductor substrate is treated in a hydrogen gas atmosphere and the gate oxide film is formed by a wet oxidization process. Korean Patent Laid-Open Publication No. 2002-9213 discusses another method for annealing a semiconductor substrate including a first and second gate oxide films formed thereon using a gas of HCl during a process of forming a dual gate oxide film.
FIG. 6A is an enlarged cross-sectional view illustrating a profile of an STI region formed according to the conventional methods of forming a dual gate oxide film discussed above. As shown in FIG. 6A, a first gate oxide film 20 having a thickness of approximately 73 xc3x85 is formed on a semiconductor substrate where an active region 12 is defined by STI regions 18 including an inner oxide film 14 and a nitride liner 16 formed on an inner sidewall of a trench. The first gate oxide film 20 is formed through a hydrochloric acid oxidization process using a gas of O2/HCl.
The semiconductor substrate is rinsed by a wet rinsing process after the first gate oxide film 20 is removed from a peripheral circuit region (not shown) where a thin gate oxide film is to be formed through a photolithography process and a wet etching process. Subsequently, a second gate oxide film (not shown) having a thickness of approximately 54 xc3x85 is formed in the peripheral circuit region through a hydrochloric acid oxidization process using a gas of O2/HCl. As a result, the first gate oxide film 20 in the cell region can be thickened from about 73 xc3x85 to about 83 xc3x85.
When the first gate oxide film 20 is formed using the hydrochloric acid oxidization process, the concentration of HCl can be locally increased toward the edge portion of the active region 12 due to the compressive stress applied to the inner oxide film 14 in the horizontal direction due to the nitride liner 16 as discussed above in reference to FIG. 2. If the concentration of HCl is increased at the edge portion, the thickness of the first gate oxide film 20 can be increased at the edge portion A of the active region 12 because the growth of the oxide film may increase. As a result, the effective width of an channel may be reduced. Reducing the effective width of the channel may reduce the saturation current (Idast) of the transistor may be reduced which may decrease the speed of the transistor.
Embodiments according to the invention can provide methods of forming gate oxide films using wet or dry oxidization without chloride. Pursuant to these embodiments, a gate oxide film of an integrated circuit device can be formed by forming a gale oxide film on a substrate on an active region adjacent to a trench isolation region in a first gas atmosphere with a first amount of chloride. The gate oxide film is annealed in a second gas atmosphere including a second amount of chloride that is greater than the first amount.
In some embodiments according to the invention, the gate oxide film is a first gate oxide film and the active region is a first active region in a cell region of the integrated circuit device. A second gate oxide film can be formed on a second active area of the substrate in a peripheral region of the integrated circuit device spaced apart from the first active area in a second gas atmosphere with the second amount of chloride.
In some embodiments according to the invention, the first amount of chloride comprises substantially no chloride. In some embodiments according to the invention, the first gate oxide film has a first thickness. The first thickness of the first gate oxide film can be reduced and an oxidization process can be performed on the substrate spaced apart from the first gate oxide film using a third gas including chloride to form a second gate oxide film to a second thickness and to thicken the first gate oxide film to a third thickness that is greater than the second thickness.
In some embodiments according to the invention, the first gas can be at least one of O2 gas. O2/N2 gas, O2/N2O as and O2/NO gas. In some embodiments according to the invention, the first as can be at least one of H2/O2 gas or H2O gas.
In some embodiments according to the invention, the gate oxide film can be formed at a temperature in a range between about 780xc2x0 C. and about 900xc2x0 C. In some embodiments according to the invention, the gate oxide film can be formed at a temperature in a range between about 780xc2x0 C. and about 850xc2x0 C.
In some embodiments according to the invention, a ratio between a first thickness of portion of the gate oxide film located on a central portion of the active region and a second thickness of a portion of the gate oxide film located at an edge portion of the active region is in a range between about 1:1 and about 1:1.5.
In some embodiments according to the invention, the second gas includes at least one selected from the group consisting of HCl, Cl2, C2HCl3, CH2Cl2, and C2H3Cl3. In some embodiments according to the invention, the annealing can be provided by annealing the first gate oxide film using a furnace or by performing a rapid thermal annealing process. In some embodiments according to the invention, the gate oxide film is annealed at a temperature in a range between about 850xc2x0 C. and about 900xc2x0 C. In some embodiments according to the invention, the formation of the gate oxide film and the annealing are performed in-situ.